半导体学报2020年第2期目次

Special Issue on Reconfigurable Computing for Energy Efficient AI Microchip Technologies

J. Semicond. Volume 41, Number 2, February 2020 

COMMENTS AND OPINIONS

Reconfigurable computing: a promising microchip architecture for artificial intelligence

Shaojun Wei

J. Semicond. 2020, 41(2): 020301

doi: 10.1088/1674-4926/41/2/020301

EDITORIAL

Preface to the Special Issue on Reconfigurable Computing for Energy Efficient AI Microchip Technologies

Haigang Yang, Yajun Ha, Lingli Wang, Wei Zhang, Yingyan Lin

J. Semicond. 2020, 41(2): 020101

doi: 10.1088/1674-4926/41/02/020101

REVIEWS

Architecture, challenges and applications of dynamic reconfigurable computing

Yanan Lu, Leibo Liu, Jianfeng Zhu, Shouyi Yin, Shaojun Wei

J. Semicond. 2020, 41(2): 021401

doi: 10.1088/1674-4926/41/2/021401

A survey of FPGA design for AI era

Zhengjie Li, Yufan Zhang, Jian Wang, Jinmei Lai

J. Semicond. 2020, 41(2): 021402

doi: 10.1088/1674-4926/41/2/021402

A survey of neural network accelerator with software development environments

Jin Song, Xuemeng Wang, Zhipeng Zhao, Wei Li, Tian Zhi

J. Semicond. 2020, 41(2): 021403

doi: 10.1088/1674-4926/41/2/021403

ARTICLES

Accelerating hybrid and compact neural networks targeting perception and control domains with coarse-grained dataflow reconfiguration

Zheng Wang, Libing Zhou, Wenting Xie, Weiguang Chen, Jinyuan Su, Wenxuan Chen, Anhua Du,Shanliao Li, Minglan Liang, Yuejin Lin, Wei Zhao, Yanze Wu, Tianfu Sun, Wenqi Fang, Zhibin Yu

J. Semicond. 2020, 41(2): 022401

doi: 10.1088/1674-4926/41/2/022401

HRM: H-tree based reconfiguration mechanism in reconfigurable homogeneous PE array

Junyong Deng, Lin Jiang, Yun Zhu, Xiaoyan Xie, Xinchuang Liu, Feilong He, Shuang Song, L. K. John

J. Semicond. 2020, 41(2): 022402

doi: 10.1088/1674-4926/41/2/022402

Towards efficient deep neural network training by FPGA-based batch-level parallelism

Cheng Luo, Man-Kit Sit, Hongxiang Fan, Shuanglong Liu, Wayne Luk, Ce Guo

J. Semicond. 2020, 41(2): 022403

doi: 10.1088/1674-4926/41/2/022403

Towards high performance low bitwidth training for deep neural networks

Chunyou Su, Sheng Zhou, Liang Feng, Wei Zhang

J. Semicond. 2020, 41(2): 022404

doi: 10.1088/1674-4926/41/2/022404

A routing algorithm for FPGAs with time-multiplexed interconnects

Ruiqi Luo, Xiaolei Chen, Yajun Ha

J. Semicond. 2020, 41(2): 022405

doi: 10.1088/1674-4926/41/2/022405

Optimizing energy efficiency of CNN-based object detection with dynamic voltage and frequency scaling

Weixiong Jiang, Heng Yu, Jiale Zhang, Jiaxuan Wu, Shaobo Luo, Yajun Ha

J. Semicond. 2020, 41(2): 022406

doi: 10.1088/1674-4926/41/2/022406

半导体学报公众号

微信号 : JournalOfSemicond

长按二维码关注获得更多信息

↓↓↓ 点击"阅读原文" 【查看更多信息】